Programming information on 6502 series machine code.
The 6502 is an 8 bit processor with a 16 bit address bus, giving a memory addressing range of 65536 bytes. It has one general purpose register, two indexing registers, a stack register, a status register and program counter.
The 6502 has no direct input/output capabilities and hence hardware must be memory mapped.
All addresses are comprised of two bytes and are arranged little endian.
There are three interrupt types including non-maskable, maskable and software. An interrupt bit in the status register controls maskable interrupts. On receipt of an interrupt the processor will push the registers on the stack and vector through the following addresses:
- FFFAH/FFFBH Non Maskable Interrupt (NMI)
- FFFCH/FFFDH Processor Reset
- FFFEH/FFFFH Maskable Interrupt
- FFFEH/FFFFH Software Interrupt (Break)
The 6502 supports 56 instruction types in the following categories:
The 6502 has the following addressing modes:
Zero Page Indexed
Zero Page Pre Indirect
Zero Page Post Indirect
Some simple tasks are very common in 6502 programming.
Examples are in pseudo assembly language, with labels where appropriate.
Multi Byte Addition
Two Byte Multiplication
The two addresses are stored in zero page. The Y register contains the size of the block to move minus one.
Because of its enduring popularity as the core of the Commodore 64 and as an embedded systems controller, there are a number of Web sites and pages about the 6502 architecture. Here are just a couple of them: